دانشگاه تربیت دبیر شهید رجائی

  اخبار و اعلانات

 آمار

تعداد نشریات13
تعداد شماره‌ها200
تعداد مقالات2,008
تعداد مشاهده مقاله2,679,882
تعداد دریافت فایل اصل مقاله1,937,233
Sadeghi, S., Nayeri, M., Dolatshahi, M., Moftakharzadeh, A.. (1401). Novel Ultra-Low-Power Mirrored Folded-Cascode Transimpedance Amplifier. فناوری آموزش, 11(1), 217-228. doi: 10.22061/jecei.2022.9015.568
S. Sadeghi; M. Nayeri; M. Dolatshahi; A. Moftakharzadeh. "Novel Ultra-Low-Power Mirrored Folded-Cascode Transimpedance Amplifier". فناوری آموزش, 11, 1, 1401, 217-228. doi: 10.22061/jecei.2022.9015.568
Sadeghi, S., Nayeri, M., Dolatshahi, M., Moftakharzadeh, A.. (1401). 'Novel Ultra-Low-Power Mirrored Folded-Cascode Transimpedance Amplifier', فناوری آموزش, 11(1), pp. 217-228. doi: 10.22061/jecei.2022.9015.568
Sadeghi, S., Nayeri, M., Dolatshahi, M., Moftakharzadeh, A.. Novel Ultra-Low-Power Mirrored Folded-Cascode Transimpedance Amplifier. فناوری آموزش, 1401; 11(1): 217-228. doi: 10.22061/jecei.2022.9015.568

Novel Ultra-Low-Power Mirrored Folded-Cascode Transimpedance Amplifier

Journal of Electrical and Computer Engineering Innovations (JECEI)
دوره 11، شماره 1، فروردین 2023، صفحه 217-228    اصل مقاله (831.38 K)
نوع مقاله: Original Research Paper
شناسه دیجیتال (DOI): 10.22061/jecei.2022.9015.568
نویسندگان
S. Sadeghi1؛ M. Nayeri* 1؛ M. Dolatshahi2؛ A. Moftakharzadeh3
1Department of Electrical Engineering, Yazd Branch, Islamic Azad University, Yazd, Iran.
2Department of Electrical Engineering, Najafabad Branch, Islamic Azad University, Najafabad, Iran.
3Department of Electrical Engineering, Yazd University, Yazd, Iran.
تاریخ دریافت: 16 خرداد 1401،  تاریخ بازنگری: 27 مرداد 1401،  تاریخ پذیرش: 04 مهر 1401 
چکیده
Background and Objectives: In this paper, a novel structure as a Folded-Mirror (FM) Trans-impedance Amplifier (TIA) is designed and introduced for the first time based on the combination of the current-mirror and the folded-cascade topologies. The trans-impedance amplifier stage is the most critical building block in a receiver system. This novel proposed topology is based on the combination of the current mirror topology and the folded-cascade topology, which is designed using active elements. The idea is to use a current mirror topology at the input node. In the proposed circuit, unlike many other reported designs, the signal current (and not the voltage) is being amplified till it reaches the output node. The proposed TIA benefits from a low input resistance, due to the use of a diode-connected transistor, as part of the current mirror topology, which helps to isolate the dominant input capacitance. So, as a result, the data rate of 5Gbps is obtained by consuming considerably low power. Also, the designed circuit employs only six active elements, which yields a small occupied chip area, while providing 40.6dBΩ of trans-impedance gain, 3.55GHz frequency bandwidth, and 664nArms input-referred noise by consuming only 315µW power using a 1V supply. Results justify the proper performance of the proposed circuit structure as a low-power TIA stage.
Methods: The proposed topology is based on the combination of the current mirror topology and the folded-cascade topology. The circuit performance of the proposed folded-mirror TIA is simulated using 90nm CMOS technology parameters in the Hspice software. Furthermore, the Monte-Carlo analysis over the size of widths and lengths of the transistors is performed for 200runs, to analyze the fabrication process.
Results: The proposed FM TIA circuit provides 40.6dBΩ trans-impedance gain and 3.55GHz frequency bandwidth, while, consuming only 315µW power using a 1V supply. Besides, as analyzing the quality of the output signal in the receiver circuits for communication applications is vital, the eye-diagram of the proposed FM TIA for a 50µA input signal is opened about 5mV, while, for a 100µA input signal the eye is opened vertically about 10mV. So, the vertical and horizontal opening of the eye is clearly shown. Furthermore, Monte-Carlo analysis over the trans-impedance gain represents a normal distribution with the mean value of 40.6dBΩ and standard deviation of 0.4dBΩ. Also, the value of the input resistance of the FM TIA is equal to 84.4Ω at low frequencies and reaches the value of 75Ω at -3dB frequency. The analysis of the effect of the feedback network on the value of the input resistance demonstrates the input resistance in the absence of the feedback network reaches up to 1.4MΩ, which yields the importance of the existence of the feedback network to obtain a broadband system.
Conclusion: In this paper, a trans-impedance amplifier based on a combination of the current-mirror topology and the folded-cascade topology is presented, which amplifies the current signal and converts it to the voltage at the output node. Due to the existence of a diode-connected transistor at the input node, the input resistance of the TIA is comparatively small. Furthermore, four out of six transistors are PMOS transistors, which represent less thermal noise in comparison with NMOS transistors. Also, the proposed Folded-Mirror topology occupies a relatively small area on-chip, due to the fact that no passive element is used in the feedforward network. Results using 90nm CMOS technology parameters show 40.6dBΩ trans-impedance gain, 3.55GHz frequency bandwidth, 664nArms input-referred noise, and only 315µW power dissipation using a 1volt supply, which indicates the proper performance of the proposed circuit as a low-power building block.
کلیدواژه‌ها
Trans-impedance Amplifier؛ Folded-Mirror؛ Optical Receiver؛ Folded-Cascade؛ Ultra-Low-Power
مراجع
[1] B. Razavi, Integrated Circuit for Optical Communications, Second edition, New York  John Wiley & Sons Inc, New Jersey, 2012.

[2] K. Schneider, H. Zimmermann, Highly Sensitive Optical Receivers, Springer Series in advanced Microelectronics, Netherland, 2006.

[3] S. Zohoori, M. Dolatshahi, "A Low-power, CMOS transimpedance amplifier in 90-nm technology for 5-Gbps optical communication applications," Int. J. Circuit Theory Appl., 46: 1-14, 2018.

[4] D. Li, G. Minoia, M. Repossi, D. Baldi & etc., "A Low-noise design technique for High-speed CMOS optical receivers," IEEE J. Solid-State Circuits, 49: 1437-1446, 2014.

[5] S. Zohoori, M. Dolatshahi, "A CMOS Low-power optical front-end for 5Gbps applications," Fiber Integr. Opt., 37: 37-56, 2018.

[6] M. Atef, H. Zimmermann, "Optical receiver using noise cancelling with an integrated photodiode in 40nm CMOS technology," IEEE Trans. Circuits Syst. I: Regul. Pap., 60: 1929-1936, 2013.

[7] S. Zohoori, M. Dolatshahi, M. Pourahmadi, M. Hajisafari, "A CMOS, Low-power current-mirror-based transimpedance amplifier for 10Gbps optical communications," Microelectronics J., 80: 18-27, 2018.

[8] Y. H. Chien, K. L. Fu, Sh. I. Liu, "A 3-25 Gb/s four-channel receiver with noise-cancelling TIA and power-scalable LA," IEEE Trans. Circuits Syst., 61: 845-850, 2014.

[9] B. Nakhkoob, M. Mostafa Hella, "A 5-Gb/s noise optimized receiver using a switched TIA for wireless optical communications," IEEE Trans. Circuits Syst. I: Regul. Pap., 61: 1255-1268, 2014.

[10] S. Zohoori, M. Dolatshahi, "An inductor-less, 10Gbps trans-impedance amplifier operating at low supply-voltage," in Proc. 25th Iranian conference on electrical Engineering (ICEE2017), Tehran, Iran, 2017.

[11] Z. Lu, K. S. Yeo, W. M. Lim, M. A. Do, Ch. CH. Boon, "Design of a CMOS broadband transimpedance amplifier with active feedback," IEEE Trans. Very Large Scale Integr. VLSI Syst., 18: 461-472, 2010.

[12] X. Zhi-gang, CH. Ying-mei, W. Tao, Ch. Xue-hui, ZH. Li, "A 40 Gbit/s fully integrated optical receiver analog front-end in 90nm CMOS," J. China Univ. Posts Telecommun., 19: 124-128, 2012.

[13] M. Seifouri, P. Amiri, M. Rakide, "Design of broadband transimpedance amplifier for optical communication systems," Microelectronics J., 46: 679-684, 2015.

[14] M. Seifouri, P. Amiri, I. Dadras, "A transimpedance amplifier for optical communication network based on active voltage-current feedback," Microelectronics J., 67: 25-31, 2017.

[15] M. Rakide, M. Seifouri, P. Amiri, "A folded cascade-based broadband transimpedance amplifier for optical communication systems," Microelectronics J., 54: 1-8, 2016.

[16] L. Liu, J. Zou, N. Ma, Zh. Zhu, Y. Yang, "A CMOS transimpedance amplifier with high gain and wide dynamic range for optical sensing system," Optik, 126: 1389-1393, 2015.

[17] M. Atef, "Transimpedance amplifier with a compression stage for wide dynamic range optical applications," Microlelectronics J., 46: 593-597, 2015.

[18] F. Aznar, W. Gaberl, H. Zimmermann, "A 0.18um CMOS transimpedance amplifier with 26 dB dynamic range at 2.5Gb/s," Microelectronics J., 42: 1136-1142, 2011.

[19] M. Atef, F. Aznar, S. Schidl, A. Polzer, W. gaberl, H. Zimmermann, "8 Gbit/s inductorless transimpedance amplifier in 90 nm CMOS Technology," Analog Integr. Circuits Signal Process., 79: 27-36, 2014.

[20] M. Atef, H. Zimmermann, "Low-power 10Gb.s Inductorless inverter based common-drain active feedback transimpedance amplifier in 40nm CMOS," Analog Integr. Circuits Signal Process., 76: 367-376, 2013.

[21] S. Zohoori, M. Dolatshahi, M. Pourahmadi, M. Hajisafari, "An inverter-based, CMOS, Low power Optical Receiver Front-End," Fiber Integr. Opt, 38: 1-19, 2019.

[22] S. Honarmand, M. Pourahmadi, M. R. Shayesteh, K. Abbasi, "Design of an inverter-base, active-feedback, low-power transimpedance amplifier operating at 10 Gbps," J. Circuits Syst. Comput., 30(06): 2150110, 2021.

[23] P. Andre, S. Jacobus, "Design of a high gain and power efficient optical receiver front-end in 0.13μm RF CMOS technology for 10Gbps applications," Microw. Opt. Technol. Lett., 58: 1499–1504, 2016.

[24] S. Honarmand, M. Pourahmadi, M. R. Shayesteh, K. Abbasi,  "A multi-stage TIA based on cascoded-inverter structures for low-power applications," J. Integr. Circuits Syst., 16(3): 1-12, 2021.

[25] C. Toumazou, S. M. Park, "Wideband low noise CMOS transimpedance amplifier for gigahertz operation," Electron. Lett, 32: 1194-1196, 1996.

[26] S. M. Rezaul Hasa, "Design of a low-power 3.5GHz broadband CMOS transimpedance amplifier for optical transceivers," IEEE Trans. Circuits Syst. I Regul. Pap., 52: 1061-1072, 2005.

[27] B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, Singapore, 2001.

[28] M. H. Taghavi, L. Belostotski, J.W. Haslett, P. Ahmadi, "10-Gb/s 0.13-μm CMOS inductor less modified-RGC transimpedance amplifier," IEEE Trans. Circuits Syst. I: Regul. Pap., 62:, 1971–1980, 2015.

[29] K. Honda, H. Katsurai, M. Nada, "A 56-Gb/s transimpedance amplifier in 0.13-μm SiGe BiCMOS for an optical receiver with −18.8dBm input sensitivity," in Proc. the IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Austin, TX, USA, 2016.

[30] Y. Chen, J. Li, Z. Zhang, H. Wang, Y. Zhang, "12-Channel, 480 Gbit/s optical receiver analogue front-end in 0.13μm BiCMOS technology," Electron. Lett., 53: 492–494, 2017.

[31] R. Y. Chen, Z.Y. Yang, "CMOS transimpedance amplifier for gigabit-per-second optical wireless communications," IEEE Trans. Circuits Syst. II, 63: 418–422, 2016.

[32] G. Royo, C. Sanchez-Azqueta, A. D. Martinez Perez, C. Aldea, S. Celma, "Fully differential transimpedance amplifier for reliable wireless communications," Microelectron. Reliab., 83: 25-28, 2018.

[33] K. Monfared, Y. Belghisazar, "Improved low voltage low power recycling folded fully differential cascode amplifier," Tabriz J. Electr. Eng., 48: 327-334, 2018.

[34] P. Amiri, M. Seifouri, B. Afarin, A. Hedayati Pour, "Design of RGC preamplifier with bandwidth 20GHz and transimpedance 60 dBΩ for telecommunication systems," Tabriz J. Electr. Eng., 46: 15–23, 2016.

[35] M. Seifoui, P. Amiri, I. Dadras, "An electronic transimpedance amplifier for optical communications network based on active voltage-current feedback," Tabriz J. Electr. Eng., 48: 737-744, 2018.

 

آمار
تعداد مشاهده مقاله: 445
تعداد دریافت فایل اصل مقاله: 359


سامانه مدیریت نشریات علمی. قدرت گرفته از سیناوب