Rahmati, S., Farshidi, E., Ganji, J.. (1398). A Novel Method Design Multiplexer Quaternary with CNTFET. فناوری آموزش, 8(1), 9-18. doi: 10.22061/jecei.2020.7091.356
S. Rahmati; E. Farshidi; J. Ganji. "A Novel Method Design Multiplexer Quaternary with CNTFET". فناوری آموزش, 8, 1, 1398, 9-18. doi: 10.22061/jecei.2020.7091.356
Rahmati, S., Farshidi, E., Ganji, J.. (1398). 'A Novel Method Design Multiplexer Quaternary with CNTFET', فناوری آموزش, 8(1), pp. 9-18. doi: 10.22061/jecei.2020.7091.356
Rahmati, S., Farshidi, E., Ganji, J.. A Novel Method Design Multiplexer Quaternary with CNTFET. فناوری آموزش, 1398; 8(1): 9-18. doi: 10.22061/jecei.2020.7091.356
1Department of Electrical Engineering, Mahshahr Branch, Islamic Azad University, Mahshahr, Iran
2Department of Electrical Engineering, Shahid Chamran University of Ahvaz, Ahvaz, Iran.
تاریخ دریافت: 15 بهمن 1397،
تاریخ بازنگری: 03 تیر 1398،
تاریخ پذیرش: 15 آذر 1398
چکیده
Background and Objectives: In recent decades, due to the effect of the short channel, the use of CMOS transistors in the nanoscale has become a major concern. One option to deal with this issue is the use of nano-transistors. Methods: Using nano-transistors and multi-valued logic (MVL) can reduce the level of chips and connections and have a direct impact on power consumption. The present study reports the design of a new method of Multiplexers (MUXs) based on quaternary logic and transistors of carbon nanotubes (CNTFET) and having a new look at the layout and use of MUXs. Results:The use of special rotary functions and unary operators in Quaternary logic in the design of MUXs reduced the number of CNTFETs from 27% to 54%. Also, the use of MUXs in the Adder structure resulted in a 54% reduction in Power Delay Product (PDP) and a 17.5% to 85.6% reduction in CNTFET counts. Conclusion: The simulated results display a significant improvement in the fabrication of Adders, average power consumption, speed, and PDP compared to the current best-performing techniques in the literature. The proposed operators and circuits were evaluated under various operating conditions. The results show the stability of the proposed circuits.