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CNN-Based Placement and Multi-Objective Routing for Analog Circuits with Simulated Annealing and NSGA-III | ||
| Journal of Electrical and Computer Engineering Innovations (JECEI) | ||
| مقالات آماده انتشار، پذیرفته شده، انتشار آنلاین از تاریخ 25 آبان 1404 | ||
| نوع مقاله: Original Research Paper | ||
| شناسه دیجیتال (DOI): 10.22061/jecei.2025.12133.866 | ||
| نویسندگان | ||
| Atousa Gholami Boorkheyli1؛ Majid Babaeinik1؛ Hadi Dehbovid* 2؛ Vahid Ghods1 | ||
| 1Department of Electrical Engineering, Se.C., Islamic Azad University, Semnan, Iran. | ||
| 2Department of Electrical Engineering, No.C., Islamic Azad University, Noor, Iran. | ||
| تاریخ دریافت: 29 تیر 1404، تاریخ بازنگری: 04 آبان 1404، تاریخ پذیرش: 12 آبان 1404 | ||
| چکیده | ||
| Background and Objectives: This research aims to optimize component placement in integrated systems using evolutionary algorithms. The primary goal is to generate a compact floorplan while satisfying design constraints, particularly in analog circuits where symmetry and proximity constraints are critical to minimizing coupling interference and enhancing performance. The study proposes using a convolutional neural network (CNN) to extract these placement constraints, with its parameters optimized via the non-dominated sorting genetic algorithm III (NSGA-III). Additionally, a hybrid routing approach combining simulated annealing (SA) and NSGA-III is introduced to improve routing efficiency through multi-objective optimization. Methods: The placement constraints, including symmetry and proximity requirements, are extracted using a CNN, whose parameters are optimized by NSGA-III. For routing, a hybrid approach is employed where SA generates initial routing solutions, which are then refined by NSGA-III for multi-objective optimization. The proposed method is implemented on a two-stage recycling folded cascade (RFC) amplifier in 0.18μm CMOS technology with a 1.8V supply voltage. A dedicated MATLAB toolbox is developed to facilitate placement while adhering to design rules using optimization algorithms. Results: Simulation results confirm the effectiveness of the proposed methodology, demonstrating optimized placement and routing with improved circuit performance. The combination of CNN and NSGA-III successfully generates a compact and efficient layout, while the hybrid routing approach (SA + NSGA-III) enhances the routing process. The RFC amplifier case study shows better utilization of physical resources and performance improvements, validating the method's efficiency. Conclusion: This study demonstrates that the proposed method, integrating evolutionary algorithms and CNN, effectively optimizes placement and routing in integrated systems. The CNN-based constraint extraction and NSGA-III optimization enable compact layouts, while the hybrid routing approach improves multi-objective optimization. Simulations on the RFC amplifier confirm enhanced circuit performance and resource utilization. This method offers significant advantages over traditional approaches and is applicable to complex and industrial designs. | ||
| کلیدواژه‌ها | ||
| Analog Circuit Placement؛ Evolutionary Algorithms؛ Convolutional Neural Network؛ NSGA-III, Simulated Annealing | ||
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